Nand2Tetris
Learning Computers from the ground up by building a working virtual Computer
Tuesday, October 8, 2013
Mux Gate
Truth Table
a b sel | f(a,b,sel)
---------------------
0 0 0 | 0
0 0 1 | 0
0 1 0 | 0
0 1 1 | 1
1 0 0 | 1
1 0 1 | 0
1 1 0 | 1
1 1 1 | 1
Boolean Expression
----------------------------------------
CHIP Mux
{
IN a, b, sel;
OUT out;
PARTS:
Not(in=sel, out=selNot);
And(a=selNot, b=a, out=out1);
And(a=sel, b=b, out=out2);
Or(a=out1, b=out2, out=out);
}
----------------------------------------
Thursday, May 9, 2013
Or16 Gate
Truth Table
a[x] | b[x] | f(a[x],b[x])
----------------------------
0 | 0 | 0
0 | 1 | 1
1 | 0 | 1
1 | 1 | 1
--------------------------------------------------
CHIP Or16
{
IN a[16], b[16];
OUT out[16];
PARTS:
Or(a=a[0], b=b[0], out=out[0]);
Or(a=a[1], b=b[1], out=out[1]);
Or(a=a[2], b=b[2], out=out[2]);
Or(a=a[3], b=b[3], out=out[3]);
Or(a=a[4], b=b[4], out=out[4]);
Or(a=a[5], b=b[5], out=out[5]);
Or(a=a[6], b=b[6], out=out[6]);
Or(a=a[7], b=b[7], out=out[7]);
Or(a=a[8], b=b[8], out=out[8]);
Or(a=a[9], b=b[9], out=out[9]);
Or(a=a[10], b=b[10], out=out[10]);
Or(a=a[11], b=b[11], out=out[11]);
Or(a=a[12], b=b[12], out=out[12]);
Or(a=a[13], b=b[13], out=out[13]);
Or(a=a[14], b=b[14], out=out[14]);
Or(a=a[15], b=b[15], out=out[15]);
}
--------------------------------------------------
Again you just take 2 arrays of 16 bits and OR each set of 2 bits from each array with the same index.
a[x] | b[x] | f(a[x],b[x])
----------------------------
0 | 0 | 0
0 | 1 | 1
1 | 0 | 1
1 | 1 | 1
--------------------------------------------------
CHIP Or16
{
IN a[16], b[16];
OUT out[16];
PARTS:
Or(a=a[0], b=b[0], out=out[0]);
Or(a=a[1], b=b[1], out=out[1]);
Or(a=a[2], b=b[2], out=out[2]);
Or(a=a[3], b=b[3], out=out[3]);
Or(a=a[4], b=b[4], out=out[4]);
Or(a=a[5], b=b[5], out=out[5]);
Or(a=a[6], b=b[6], out=out[6]);
Or(a=a[7], b=b[7], out=out[7]);
Or(a=a[8], b=b[8], out=out[8]);
Or(a=a[9], b=b[9], out=out[9]);
Or(a=a[10], b=b[10], out=out[10]);
Or(a=a[11], b=b[11], out=out[11]);
Or(a=a[12], b=b[12], out=out[12]);
Or(a=a[13], b=b[13], out=out[13]);
Or(a=a[14], b=b[14], out=out[14]);
Or(a=a[15], b=b[15], out=out[15]);
}
--------------------------------------------------
Again you just take 2 arrays of 16 bits and OR each set of 2 bits from each array with the same index.
Wednesday, May 8, 2013
And16 Gate
Truth Table
a[x] | b[x] | f(a[x],b[x])
----------------------------
0 | 0 | 0
0 | 1 | 0
1 | 0 | 0
1 | 1 | 1
--------------------------------------------------
CHIP And16
{
IN a[16], b[16];
OUT out[16];
PARTS:
And(a=a[0], b=b[0], out=out[0]);
And(a=a[1], b=b[1], out=out[1]);
And(a=a[2], b=b[2], out=out[2]);
And(a=a[3], b=b[3], out=out[3]);
And(a=a[4], b=b[4], out=out[4]);
And(a=a[5], b=b[5], out=out[5]);
And(a=a[6], b=b[6], out=out[6]);
And(a=a[7], b=b[7], out=out[7]);
And(a=a[8], b=b[8], out=out[8]);
And(a=a[9], b=b[9], out=out[9]);
And(a=a[10], b=b[10], out=out[10]);
And(a=a[11], b=b[11], out=out[11]);
And(a=a[12], b=b[12], out=out[12]);
And(a=a[13], b=b[13], out=out[13]);
And(a=a[14], b=b[14], out=out[14]);
And(a=a[15], b=b[15], out=out[15]);
}
--------------------------------------------------
Same as the 1 bit AND gate but you take 2 sets of 16 bits and AND each set of 2 bits from each array with the same index.
a[x] | b[x] | f(a[x],b[x])
----------------------------
0 | 0 | 0
0 | 1 | 0
1 | 0 | 0
1 | 1 | 1
--------------------------------------------------
CHIP And16
{
IN a[16], b[16];
OUT out[16];
PARTS:
And(a=a[0], b=b[0], out=out[0]);
And(a=a[1], b=b[1], out=out[1]);
And(a=a[2], b=b[2], out=out[2]);
And(a=a[3], b=b[3], out=out[3]);
And(a=a[4], b=b[4], out=out[4]);
And(a=a[5], b=b[5], out=out[5]);
And(a=a[6], b=b[6], out=out[6]);
And(a=a[7], b=b[7], out=out[7]);
And(a=a[8], b=b[8], out=out[8]);
And(a=a[9], b=b[9], out=out[9]);
And(a=a[10], b=b[10], out=out[10]);
And(a=a[11], b=b[11], out=out[11]);
And(a=a[12], b=b[12], out=out[12]);
And(a=a[13], b=b[13], out=out[13]);
And(a=a[14], b=b[14], out=out[14]);
And(a=a[15], b=b[15], out=out[15]);
}
--------------------------------------------------
Same as the 1 bit AND gate but you take 2 sets of 16 bits and AND each set of 2 bits from each array with the same index.
Not16 Gate
Truth Table
in[x] | f(in[x])
-----------------
0 | 1
1 | 0
----------------------------------------
CHIP Not16
{
IN in[16];
OUT out[16];
PARTS:
Not(in=in[0], out=out[0]);
Not(in=in[1], out=out[1]);
Not(in=in[2], out=out[2]);
Not(in=in[3], out=out[3]);
Not(in=in[4], out=out[4]);
Not(in=in[5], out=out[5]);
Not(in=in[6], out=out[6]);
Not(in=in[7], out=out[7]);
Not(in=in[8], out=out[8]);
Not(in=in[9], out=out[9]);
Not(in=in[10], out=out[10]);
Not(in=in[11], out=out[11]);
Not(in=in[12], out=out[12]);
Not(in=in[13], out=out[13]);
Not(in=in[14], out=out[14]);
Not(in=in[15], out=out[15]);
}
----------------------------------------
Not too much different then a 1 bit NOT gate you just take 2 sets of 16 bits and NOT each set of 2 bits from each array with the same index.
in[x] | f(in[x])
-----------------
0 | 1
1 | 0
----------------------------------------
CHIP Not16
{
IN in[16];
OUT out[16];
PARTS:
Not(in=in[0], out=out[0]);
Not(in=in[1], out=out[1]);
Not(in=in[2], out=out[2]);
Not(in=in[3], out=out[3]);
Not(in=in[4], out=out[4]);
Not(in=in[5], out=out[5]);
Not(in=in[6], out=out[6]);
Not(in=in[7], out=out[7]);
Not(in=in[8], out=out[8]);
Not(in=in[9], out=out[9]);
Not(in=in[10], out=out[10]);
Not(in=in[11], out=out[11]);
Not(in=in[12], out=out[12]);
Not(in=in[13], out=out[13]);
Not(in=in[14], out=out[14]);
Not(in=in[15], out=out[15]);
}
----------------------------------------
Not too much different then a 1 bit NOT gate you just take 2 sets of 16 bits and NOT each set of 2 bits from each array with the same index.
Xor Gate
Truth Table
a b | f(a,b)
------------
0 0 | 0
0 1 | 1
1 0 | 1
1 1 | 0
Boolean Expression
(!x*y)+(x*!y)
----------------------------------------
CHIP Xor
{
IN a, b;
OUT out;
PARTS:
Not(in=a, out=aNot);
Not(in=b, out=bNot);
And(a=aNot, b=b, out=out1);
And(a=a, b=bNot, out=out2);
Or(a=out1, b=out2, out=out);
}
----------------------------------------
Another that might seem hard at first but adding a few gates together does the trick. Seeing as you want to know when its one or the other and not both the first and gate returns a 1 only if y is 1 and x is not, and the second does the the opposite returns a 1 if x is 1 and y is not. Then its just a matter of outputing a 1 if either AND gate returned a 1.
Or Gate
Truth Table
a b | f(a,b)
------------
0 0 | 0
0 1 | 1
1 0 | 1
1 1 | 1
Boolean Expresions
a+b
---------------------------------------------
CHIP Or
{
IN a, b;
OUT out;
PARTS:
Not(in=a, out=aNot);
Not(in=b, out=bNot);
Nand(a=aNot, b=bNot, out=out);
}
---------------------------------------------
At first this one might seem difficult but since we have the NAND gate the opposite of what we want we just take the opposite of each in and then NAND the results.
a b | f(a,b)
------------
0 0 | 0
0 1 | 1
1 0 | 1
1 1 | 1
Boolean Expresions
a+b
---------------------------------------------
CHIP Or
{
IN a, b;
OUT out;
PARTS:
Not(in=a, out=aNot);
Not(in=b, out=bNot);
Nand(a=aNot, b=bNot, out=out);
}
---------------------------------------------
At first this one might seem difficult but since we have the NAND gate the opposite of what we want we just take the opposite of each in and then NAND the results.
Monday, May 6, 2013
And Gate
Truth Table
a b | f(a,b)
-------------
0 0 | 0
0 1 | 0
1 0 | 0
1 1 | 1
Boolean Expression
x*y
----------------------------------------
CHIP And
{
IN a, b;
OUT out;
PARTS:
Nand(a=a, b=b, out=out1);
Not(in=out1, out=out);
}
----------------------------------------
Seeing as we started with the opposite of this gate the NAND and that we just created the NOT gate its as simple as taking the opposite(NOT) of the NAND gate.
a b | f(a,b)
-------------
0 0 | 0
0 1 | 0
1 0 | 0
1 1 | 1
Boolean Expression
x*y
----------------------------------------
CHIP And
{
IN a, b;
OUT out;
PARTS:
Nand(a=a, b=b, out=out1);
Not(in=out1, out=out);
}
----------------------------------------
Seeing as we started with the opposite of this gate the NAND and that we just created the NOT gate its as simple as taking the opposite(NOT) of the NAND gate.
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